P3 Bit Register
![The 3-bit Shift Register circuit a in [12], b in [15], c in [21 ...](https://www.researchgate.net/publication/327066328/figure/fig12/AS:961654938431495@1606287812210/The-3-bit-Shift-Register-circuit-a-in-12-b-in-15-c-in-21.png "P3 Bit Register")
![index [merberich.github.io]](https://www.edwardbosworth.com/My5155Text_V07_HTM/MyText5155_Ch07_V07_files/image100.gif "P3 Bit Register")
![3-bit SISO shift register. a block diagram [12, 15], b Timing diagram ...](https://www.researchgate.net/publication/327066328/figure/fig3/AS:961654930026497@1606287810495/The-proposed-5-layer-3-bit-SISO-shift-registers-in-the-QCA-technology_Q640.jpg "P3 Bit Register")
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