Launch Path Capture Path
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![[Digital Logic] Static Timing Analysis (STA) - Shumin Blog](https://www.synopsys.com/content/dam/synopsys/solutions/design/timing-paths-diagram.jpg.imgw.850.x.jpg)






![[Digital Logic] Static Timing Analysis (STA) - Shumin Blog](https://www.synopsys.com/content/dam/synopsys/solutions/design/paths-timing-analysis.jpg.imgw.850.x.jpg)

















![[译文] Constraining Multiple Synchronous Clock Design in Synthesis // 在综合 ...](https://pic2.zhimg.com/v2-4d8c01800dd55f7327239343dfce0a45_b.jpg)














































