Diode Layout Psub
![[SOLVED] - LVS problem: Parasitic NW to P-sub junction diode is not ...](https://www.researchgate.net/profile/Thomas-Kaempfe/publication/343399756/figure/fig1/AS:920470408941580@1596468655696/Cross-section-of-the-thin-oxide-n-and-p-MOSFETs-in-22nm-FDSOI-technology-with-flip-well_W640.jpg "Diode Layout Psub")
![[PDF] Approaching to an optimal value of rise time in n-well/p ...](https://d3i71xaburhd42.cloudfront.net/9fcb4650ca0913be4efd40afbb5d1bd09f5457b2/2-Figure1-1.png "Diode Layout Psub")
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